B441/B54 (§27687/§27688):
Digital Hardware Design
Fall 2006

What's New Look here regularly for postings.
12/4	•  Scores and grades are posted [PDF] •  NOTICE:I have been told that a change in the payment scheduling for enrolling students has caused many students to defer registration until the beginning of next semester. This implies that my predictions about closing P442/542 may have been premature. If you are interested in pursuing further study of digital systems, please contact me. There are three possible continuations of B441: Enrollment justtifies keeping B442/542 on the schedule this Spring. The P545 (Embedded & Real Time Systems) course can provide alternative project for students wanting to pursue hardware expertise. I can supervise individualized projects (Y391, Y499, Y790) in hardware. In this case, I routinely recommend "P" credit for these projects, however students looking at this option are required to consult with me before registering.
12/4	•  Lecture notes on microcode [PDF]
11/29	•  Solutions to Test 2 problems 1-3 [PDF]
11/27	•  Lecture notes on FPGAs [PDF] •  Xilinx XC4000 data book [PDF]
10/20	•  Midterm Evaluations are posted [HTM] •  Answers for Test One [PDF]
10/5	•  First design example using Algorithmic State Machines (ASMs) [PDF]
10/16	•  Chapter 5 updated with more (but not all) figures. [PDF]
10/2	•  There will be an in-class test on Wednesday, October 11. The test cover material in Chapters 1-4, focusing on practical skills needed in the laboratory, including •   mixed-logic interpretation and gate-level implementation •   truth tables, normal (minimal SOP) forms •   SOP minimization (K-maps) •   basic combinational building blocks (selectors, encoders, etc.) •   tri-state and wired-and/or logic
10/2	•  Presentation materials on hazards [PDF], D flip-flop model [PDF]
9/19	• [PDF] Presentation materials, Speeding up Addition.
	• [HTM] prior postings

Course information
Home Page:	http://www.cs.indiana.edu/classes/b441/index.htm
Lectures:	9:30•10:45, MW, Geology (GY) 126
Instructor:	Steve Johnson ( sjohnson@cs.indiana.edu)
Laboratory:	Schedule and other info
Lab Meetings:	TBA, LH008 Lab partners should attend the same session;
Lab Instructor:	Caleb Hess ( hess@cs.indiana.edu)
Reading:	Lecture notes, readings, and technical references are posted electronically. Revisions and additions are indicated by green highlighting. Monitor this listing regularly. NOTE: This index contains links to draft material, including revisions to an existing textbook. B441/B541 students may print copies of this material for personal use during the sememster. These copies should be discarded once the course is over. You may not distribute this material to others or create links to this index on your own web pages. Prior students of B441/B541 may obtain -to-date versions by contacting Steven D. Johnson. Posted Link Title Ch. 1 9/8 [PDF] Design Overview Ch. 1 8/27 [PDF] Digital Logic Ch. 2 8/27 [PDF] Realizing Logic in Hardware Ch. 3 8/27 [PDF] Manipulating Logic Specifications Ch. 4 9/18 [PDF] Combinational Building Blocks NOTE: Missing figures to be added Ch. 4 10/4 [PDF] Supplemental notes on speeding up addition Ch. 5 10/5 [PDF] Building Blocks with Memory NOTE: Updated 10/5 NOTE: Missing figures to be added Ch. 5 10/4 [PDF] Hazard example Ch. 5 10/4 [PDF] D flip-flop model Ch. 7 8/28 [PDF] Designing a Minicompter Franklin Prosser and David Winkel, The Art of Digital Design, out of print. Not required. The course closely follows the outline of this textbook, especially Part II, which presents the Laboratory Project. A limited number of copies are available from the instructor. Used copies can be purchased on line [HTML] B441/451 Laboratory Experiments [PDF] Under revision. This version is slightly out of date, but a similar sequence of laboratory assignments will be used.

§ Catalog Description

B441 Digital Design (4 cr.) P: C335 or H335. Organization and logic design of digital systems. Course presents a structured design philosophy, emphasizing hardwired and microprogrammed control. Boolean algebra, hardware building blocks, circuit synthesis, microprogramming. In the laboratory students build, study, and debug a working computer from basic hardware components. Credit not given for both B441 and B541. Graduate credit possible for PhD Minor only. Lecture and laboratory. Lab fee.

B541 Hardware System Design I (3 cr.) P: C335 and C343 or honors version. Structured approach to hardware design emphasizing hardwired and microprogrammed control. Boolean algebra, hardware building blocks, architecture and control, implementation issues. In the laboratory, students build a working computer using hardware prototyping technologies. Basic training in the use of design and simulation software. Lecture and laboratory.

§ Course Overview B441/B541 is an introductory course on digital design aimed at computer science students with no prior background in electronics or engineering. Course participants gain sufficient exposure to the predominant design concerns at the digital level to work effectively at hardware/software boundary in large applications. There is increasing demand for this kind of expertise in practice. Goals include:

• A qualitative understanding of how digital devices, particularly integrated circuits (ICs), work. Students who are curious about what is going on ``inside the chip'' can learn about it in this course.
• Methods and techniques for digital design at the "component level," covering combinational digital ``logic'' and synchronous-sequential systems. Examples include instruction processors, co-processors, digital filters, special-purpose controllers, among many others.
• Implementation experience at a moderate scale, using modern computer-aided design (CAD) environments.
• Use of configurable technologies to prototype or implement digital components.

Laboratory. The course laboratory is a graduated series of assignments covering the design and implementation of a simple but "real" computer:

• The processor is functionally identical to Digital Equipment Corporation's PDP8I, the first "mini-computer." The lab implementation is "real" enough to pass all of DEC's original diagnostic software tests, run a stand-along operating system, and execute graphic calculator application from the period.

• The choice of project serves to enhances one's understanding of basic computer architecture as taught in C335. It is, in addition, a complete design example, done at a scale appropriate to a one-semester course.

• Although the lab design project starts conceptually from primtive logic devices, the hardware technology is modern. It is based on configurable Field Programmable Gate Array (FPGA) devices (a hybrid of software and hardware capabilities), now the core technology in research and embedded-system applications.

The Digital Systems course, P442/P542 is a sequel to this course. Its focus is the design of systems in which designs of the kind studied in this course are components. Thus, it addresses the "next level" of system abstraction and provides further experience with the underlying technology. In addition, it incorporates the use of programmable components, such as microcontrollers, commonly used in embedded software applications.

The two course have the explicit goal of enabling students who wish to incorporate hardware in their programs (MS projects, doctoral research, internships, etc.). On successful completion, participants have acquired experience and expertise to design, implement and use protoype digital systems.

§ Course Topics and Lectures

 

	Lect.	Topics
	1.5	Boolean algebra, Karnaugh maps
	2	Elementary devices, mixed logic
	2	Device technologies (distrubted throughout the semester) VLSI, logic gates, memories (SRAM, DRAM), programmable devices (PLDs, ROMs), configurable devices (FPGAs)
	1	Wired-or, wired-and, open-collector circuits
	1.5	Combinational building blocks: multiplexer, decoder, adder, etc.
	1.5	Speed-up of addition; buses
	1	Sequential circuits, hazards, latches, flip-flop
	1	Clocked storage elements: JK flip-flop, counters, shifters, etc.
	1	Building counters
	2	Algorithmic State Machines and state generators
	1	Clocked sequential design. clock skew, races, and other headaches
	2.5	Design examples: single pulser, traffic controller, etc.
	3	Design examples: serial bit clock, serial-parallel conversion
	3	Design example: PDP-8 terminal interface
	6	PDP8 design and implementation (distributed throughout the semester)

§ Laboratory

This is a laboratory course. It is vital that participants perform the laboratory assignments in a timely fashion. A schedule is given on the laboratory information page. Note that in some weeks it is recommended that you complete more than one of the laboratory experiment or assignment

§ Laboratory

• Up to 3 tests (may be in-class or take-home) @ 15%.
• Laboratory @ 50%
  You will not receive an A in this course unless you complete all of the laboratory assignments, resulting in a functional PDP8 computer that passes all diagnostic tests.
• A 2% credit is awarded to those students who submit course and instructor evaluations.

Please review:

• The Computer Science Department Statement on Academic Integrity and consult with the instructor if you have any questions about the policy.

• The Computer Science Department Incomplete Policy
  A grade of Incomplete is intended for circumstances in which a student is inhibited from course involvement for a few days, up to a few weeks. Incompletes are not awarded for students who fall behind in the course work and can't catch up, or who suffer circumstances that preclude long-term course participation.

  As a matter of practice, I try to accomodate students who ask for Is in order to complete lab work during the month following the course, especially those who plan to go on and take P442/P542.